Senior DFT Engineer
Location
Arizona + 3 moreAll locations: Arizona, Colorado, Florida, North Carolina
Posted
4 days ago
Salary
$136K - $218.5K / year
Job Description
Job Requirements
- Bachelor's or M.S. in Computer Engineering or Electrical Engineering (or equivalent experience)
- 5+ years of industry experience in DFT for high-performance ASICs
- Practical experience with SCAN/MBIST/Test generation tools and processes for large SoC/ASIC
- Domain expertise in DFT techniques such as ATPG, test pattern translation, yield learning, scan compression, MBIST, IEEE 1500 standard, and LBIST
- Familiarity with ATPG Streaming SCAN Network (SSN) implementation
- Experience with UDFMs like Cell Aware and Small Delay Defect
- Consistent track record in yield estimation and test optimization
- Experience working with real silicon in the lab and debugging DFT test sequences on ATE to resolve silicon issues
- Solid understanding of RTL to GDS methodologies and formal equivalence
- Excellent coding skills in Tcl and Python
- Outstanding interpersonal and organizational skills with a strong desire to work as part of a team with varied strengths.
Benefits
- equity
- benefits
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