Tensordyne

Tensordyne is a system solution company that specializes in the design of industry-leading high-performance, low-power AI inferencing. Our mission is to enable multimodal Generative AI inference acceleration at scale by providing safe, sustainable, high-performance AI-driven solutions for many markets. We are at the leading edge of advancing the latest research and product improvements for AI inference solutions that will make AI even more advantageous for compelling new applications. Well-funded, fast-paced startup company with headquarters in Sunnyvale, CA, and Munich, Germany. Many talented team members working remotely. Prioritize employees' well-being and their families. Value contributions and offer tailored benefits.

Senior ASIC Verification Engineer

Hardware EngineerHardware EngineerFull TimeRemoteTeam 51-200

Location

United States

Posted

5 days ago

Salary

Not specified

VerilogSystem VerilogUVMPythonARMRISC VAXIAMBAAPBSPII2CE MMCGPIOCache CoherencyVirtual Memory

Job Description

This description is a summary of our understanding of the job description. Click on 'Apply' button to find out more.

Role Description

As a senior member of Tensordyne’s ASIC team, you will be responsible for the pre-silicon correctness and quality of a high-performance and low-power convolutional neural network accelerator ASIC that forms the core of the company’s flagship perception module product for autonomous driving applications. This ASIC’s design closely couples novel computational accelerator units with 3rd-party SoC IP blocks to form an end-to-end vision perception module that achieves record-breaking computational performance at low power.

Your responsibilities will be wide-ranging and include:

  • Ensuring the pre-silicon correctness and quality of a multi-million gate ASIC that integrates computational accelerators and 3rd-party SoC IP blocks.
  • SoC/Subsystem verification of embedded CPUs such as ARM/RISC-V and interconnect subsystem (including C and assembly diag validation).
  • Developing the block-level, sub-system and full-chip verification environment and tests to implement test plans.
  • Working closely with design and architecture teams to understand the functional and performance goals of the design.
  • Triage and debug functional and performance issues with the design-under-test.
  • Handling bug tracking and coverage convergence.
  • Performing diagnostic and post-silicon validation tests in the lab.

Qualifications

  • 5+ years of ASIC verification experience.
  • Knowledge of ARM/MIPS/RISC-V Architectures, Memory hierarchy, Cache coherency, Virtual memory, Multicore CPU operation.
  • Familiarity with AMBA/APB/AXI Protocol.
  • Familiarity with processor peripheral interfaces like SPI, eMMC, *MII, GPIO, I2C.
  • Excellent Verilog/System Verilog programming skills.
  • Experience with UVM (or similar).
  • Deep understanding of object-oriented programming principles, constrained random stimulus, and a coverage-driven verification approach.
  • Scripting experience (Python, Perl, TCL, shell programming) highly desirable.
  • Interest to explore AI architectures for convolution, transformer and other kinds of workloads.
  • Self-starter and highly motivated to work in a dynamic start-up environment.
  • B.S. degree in Electrical or Computer Engineering (or similar field).

Benefits

  • Comprehensive benefits and competitive compensation.
  • Flexible spending and Bonusly awards.
  • Tailored benefits for health and financial security, catering to different life stages.

Company Description

Tensordyne is a system solution company that specializes in the design of industry-leading high-performance, low-power AI inferencing. Our mission is to enable multimodal Generative AI inference acceleration at scale by providing safe, sustainable, high-performance AI-driven solutions for many markets. We are at the leading edge of advancing the latest research and product improvements for AI inference solutions that will make AI even more advantageous for compelling new applications.

  • Well-funded, fast-paced startup company with headquarters in Sunnyvale, CA, and Munich, Germany.
  • Many talented team members working remotely.
  • Prioritize employees' well-being and their families.
  • Value contributions and offer tailored benefits.

Job Requirements

  • 5+ years of ASIC verification experience.
  • Knowledge of ARM/MIPS/RISC-V Architectures, Memory hierarchy, Cache coherency, Virtual memory, Multicore CPU operation.
  • Familiarity with AMBA/APB/AXI Protocol.
  • Familiarity with processor peripheral interfaces like SPI, eMMC, *MII, GPIO, I2C.
  • Excellent Verilog/System Verilog programming skills.
  • Experience with UVM (or similar).
  • Deep understanding of object-oriented programming principles, constrained random stimulus, and a coverage-driven verification approach.
  • Scripting experience (Python, Perl, TCL, shell programming) highly desirable.
  • Interest to explore AI architectures for convolution, transformer and other kinds of workloads.
  • Self-starter and highly motivated to work in a dynamic start-up environment.
  • B.S. degree in Electrical or Computer Engineering (or similar field).

Benefits

  • Comprehensive benefits and competitive compensation.
  • Flexible spending and Bonusly awards.
  • Tailored benefits for health and financial security, catering to different life stages.

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