ASIC Design Verification Engineer
Location
United States
Posted
26 days ago
Salary
Not specified
Job Description
Job Requirements
- Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field
- 8+ years of experience in ASIC verification
- Expertise in SystemVerilog UVM methodology, and simulation tools
- Strong knowledge of verification planning, testbench development, and coverage-driven verification
- Experience with industry-standard EDA tools (Cadence, Synopsys, Mentor Graphics)
- Hands-on experience with debugging tools, waveform analysis, and scripting (Python, Perl, or TCL)
- Familiarity with AI/ML accelerators, memory subsystems, and high-speed interconnects
- Proven track record of successfully verifying complex ASIC designs
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